As modern system on chip (SoC) devices, such as those for smart phones, are becoming more integrated and powerful, and as requirements for extended battery life and smaller form factor are becoming more stringent, providing solutions to thermal, power, and battery management issues is becoming more and more challenging. The ability to monitor the power rail current enables the system to mitigate potential thermal problems, manage power usage, and solve battery current limiting issues.
However, presently, the ability to provide an efficient way to monitor rail current associated with the conventional smart phone SoC has been limited. Conventional approaches, such as using a current sensing element or managing power exclusively through a power management chip, are prohibitively expensive, not very effective, not power efficient, and/or are too intrusive which might cause reliability issues. For example, digital power meter approaches are a power prediction rather than an actual measurement, which may not always provide accurate results and cannot measure the static leakage load.